Today’s high-performance processors have fast rise times, low driver output impedance, and simultaneously switching of busses, which create high transient currents in the power and ground planes that degrade the performance and reliability of the product. Inadequate power delivery can exhibit intermittent signal integrity issues.
Continuing from my previous columns (Parts 1 and 2), I will elaborate on power distribution networks (PDNs) and define power planes and paths.
IV. Define the Power Delivery Planes and Paths: Define the power/ground regions and plane layers. Partition (not split) the ground planes.
The power and ground planes in a high-speed, multilayer PCB perform six crucial functions:
- Allow the routing of controlled impedance transmission lines in both microstrip and stripline configurations
- Provide a reference voltage for the exchange of digital signals
- Distribute stable power to all logic devices
- Control crosstalk between switching signals
- Provide planar capacitance to decouple high frequencies
- Present a shield for electromagnetic radiation on internal layers
For these reasons, planes are essential in today’s high-speed multilayer PCBs. Unfortunately, the number of power supplies required is increasing dramatically with IC complexity. Now, accounting for them all has become a real challenge. The high number of supplies generally leads to higher layer count substrates. In the past, we used to have more signal routing layers than planes; the opposite is now the case when the majority of stackup layers are reserved for power distribution. Although this increases the cost, it may be a godsend because it provides segregation of critical signals to avoid crosstalk and reduces radiation due to close coupling of signal traces to the reference planes.
In a recent complex design that I completed, I counted over 10 individual power supplies ranging from the 5V input power to the board to 0.75V DDR3 VTT reference voltage. These supplies required six layers (including ground) of the 10-layer stackup, which left only four layers for signal routing.
To read this entire column, which appeared in the November 2018 Design007 Magazine, click here.