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Continuing the discussion I began last week, let’s move on to BGA packages. The BGA land is considered the first “periphery” land introduced to the electronics industry. However, the collapsing BGA ball is the only land calculation that creates a smaller land than the component lead. Non-collapsing BGA balls require a larger land size than the ball size.
Via-in-pad in a flat-lead LGA produces better solder joint results than BGA technology because there are no voids in the flat LGA component lead after reflow. Figure 1 is a BGA ball cross-section that illustrates trapped air holes using via-in-pad BGA void issues.
Figure 1. A BGA ball cross-section.
However, voids created by trapped air in blind or through-hole vias can be eliminated by plugging or filling the hole prior to the land plating process. Figure 2 illustrates various types of vias that contribute to trapped air and cause voids in BGA balls.
Figure 2. Types of vias that contribute to trapped air, causing voids.
The pull-back small outline no-lead package (PSON) is a rectangular semiconductor package with metal terminals along two sides of the bottom of the package. The pull-back leads are typically 0.1 mm to 0.2 mm away from the component body edge. The body of the component is generally molded plastic and the plastic mold compound is present on all 4 sides of the terminal lead contact. The SON and PSON component families are intended to replace the leaded SOIC, and they occupy about 50% less PCB area footprint. The PSON is considered a leadless package design with a bottom paddle to conduct heat away from the package using stitch vias that attach to the GND plane.
The pull-back component lead terminal shown in Figure 3 represents the PSON and the pull-back quad flat no-lead (PQFN) which have two different lead shapes, D-shape and rectangular. These illustrations are 0.8 mm pitch 5 mm X 5 mm body outline.
Figure 3. The pull-back component lead terminal.
Note: The latest LP Wizard and LP Calculator 10.3.1 release introduces the D-shape land calculation and CAD export to tools that support D-shape lands.
See Table 1 for the IPC-7351B 3-tier land pattern environments for PSON and PQFN component lead form with the periphery solder joint goals.
Table 1. The IPC-7351B 3-tier land pattern environments for PSON and PQFN component lead form.
Ceramic and plastic column grid arrays (CGA) solder column contacts are used for larger ceramic-based packages (32.0 mm to 45.0 mm). The package resembles the earlier plated through-hole pin-grid-array but with a closer contact pin pitch. The column contact diameter is typically 0.5 mm for 1.0 mm pin pitch and 1.2 mm to 2.0 mm lead length. The columns are attached to the package either by eutectic (Pb37Sn63) solder or they are cast in place using 90% Pb and 10% Sn. Via-in-pad technology is popular with the 1.0 mm pitch CGA component family due to the lack of room for a typical dog-bone via fanout.
The longer columns typically increase solder joint reliability by absorbing the stresses created by the CTE mismatch between the ceramic package and the PCB. On the other-hand, longer columns may reduce electrical performance and will increase the overall package profile on the PCB. Also, the columns are not as rugged as a BGA solder joint and are susceptible to handling damage.
The CGA was grouped with the LGA component family solder joint goals in the IPC-7351B at 1:1 scale lead-to-land size, but the CGA solder goals were recently been updated so that the land size is 0.1 mm larger than the maximum lead diameter.
Figure 4 illustrates the CGA solder joint goal with a periphery land to form a solder fillet and Table 2 features the solder joint goal data.
Figure 4. The CGA solder joint goal.
Table 2. The solder joint goal data.
The DFN, PSON, PQFN, LGA, CGA and BGA present a different concept for developing land patterns. Effectively, there are no toe, side or heel fillets; instead, the land periphery is similar along the entire termination. Whether the component terminal shape is round, square, rectangle or D-shaped, once the tolerance is assigned it applies to the periphery of the lands for that particular part.
Thus the term “periphery” is used to signify that the principles occur all around the component package termination contact.
Tom Hausherr, CID+, is EDA library product manager for Mentor Graphics Corporation. To follow him on his blog, click here.
Did you know that the LP Wizard fully supports all the component families listed in this article? You can download the free 10-day trial license for the newly released LP Wizard 10.3.1 that now produces D-shape land style for PQFN and PSON component families by clicking here. After the 10-day trial license ends, there is no need to uninstall the program as the LP Wizard will run in demo mode (without a license) as an IPC-7351B LP Calculator.